Substrate Laser Marking

ABSTRACT

A method for forming a feature in a substrate, where residue within the feature can be easily removed. An upper sidewall portion of the feature is formed, where the upper sidewall portion forms a void in the substrate. The upper sidewall portion has an upper sidewall angle. A lower sidewall portion of the feature is formed, where the lower sidewall portion forms a void in the substrate. The lower sidewall portion has a lower sidewall angle. The upper sidewall angle of the upper sidewall portion is shallower than the lower sidewall angle of the lower sidewall portion. By forming the feature with a shallower sidewall angle at the top of the feature, any debris within the feature is more susceptible to rinsing, etching, or other cleaning procedures, and thus the feature is more easily cleaned than standard features having relatively steeper sidewalls.

FIELD

This invention relates to the fabrication of integrated circuits. Moreparticularly, this invention relates to improving the yield ofintegrated circuits formed on substrates that are marked, such as withlaser markings.

BACKGROUND

In the manufacture of integrated circuits, such as semiconductordevices, it is often desirable to form one or more features on thesubstrate, such as a semiconductor wafer substrate, for identificationpurposes. For example, in laser marking, laser radiation is used topartially melt and ablate a portion of the surface of the substrate toform a visible feature. These visible features, or indicia elements, arecreated in patterns to form identifying indicia.

The features generally have the structure of a blind bore or hole asshown in FIG. 1. Because of the shape of the feature, residue such asphotoresist can remain in the feature, and the shape of the featuremakes it difficult to completely remove the residue. The residue may,under subsequent processing conditions, eject from the feature andredeposit on nearby integrated circuits. Thus, the presence of theresidue can adversely affect subsequent manufacturing steps and decreasethe yield of integrated circuits on the substrate. As the geometries ofintegrated circuits continue to shrink, the detrimental effect ofresidue from laser marking tends to have an increasing impact on theyield.

Another shortcoming of conventional processes is their ability to renderfeatures of desirable configuration. For example, to enhance thevisibility of the features, it is desirable that the cross sections ofthe features be substantially circular. Conventional methods may notyield features having such characteristics.

What is needed, therefore, is a method for forming features that have ashape that aids removal of residue from the features and which alsorenders features of more desirable configuration.

SUMMARY

The above and other needs are provided by a method for forming a featurein a substrate, where residue within the feature can be easily removed.An upper sidewall portion of the feature is formed, where the uppersidewall portion forms a void in the substrate. The upper sidewallportion has an upper sidewall angle. A lower sidewall portion of thefeature is formed, where the lower sidewall portion forms a void in thesubstrate. The lower sidewall portion has a lower sidewall angle. Theupper sidewall angle of the upper sidewall portion is shallower than thelower sidewall angle of the lower sidewall portion.

By forming the feature with a shallower sidewall angle at the top of thefeature, any debris within the feature is more susceptible to rinsing,etching, or other cleaning procedures, and thus the feature is moreeasily cleaned than standard features having relatively steepersidewalls.

In preferred embodiments of the invention, both the upper and the lowersidewalls are formed by laser ablation of the substrate. The uppersidewall angle of the upper sidewall is preferably between about thirtydegrees and about sixty degrees, and the upper sidewall preferably has adepth of between about four microns and about eight microns. The lowersidewall angle of the lower sidewall is preferably between about sixtydegrees and about ninety degrees, and the lower sidewall preferably hasa depth of between about four microns and about eight microns. Mostpreferably the feature has a depth that is no more than about twelvemicrons.

In an alternate embodiment the invention provides identifying indicia ona substrate, where the identifying indicia are formed with a pattern ofindicia elements. The indicia elements have a shape that aids in removalof foreign material from the indicia elements on the substrate. Eachindicia element forms a blind bore in the substrate, and has a sidewallwith a sidewall angle of between about thirty degrees and about sixtydegrees. Each indicia element has a depth of no more than about twelvemicrons.

BRIEF DESCRIPTION OF THE DRAWINGS

Further advantages of the invention are apparent by reference to thedetailed description when considered in conjunction with the figures,which are not to scale so as to more clearly show the details, whereinlike reference numbers indicate like elements throughout the severalviews, and wherein:

FIG. 1 is a cross sectional view of a prior art feature where thegeometry of the feature makes it difficult to remove residue from thefeature,

FIG. 2 is a cross sectional view of a feature formed according to afirst embodiment of the invention, and

FIG. 3 is a cross sectional view of a feature formed according to asecond embodiment of the invention.

DETAILED DESCRIPTION

The invention enables the formation of identifying indicia havingimproved geometry as compared to conventional marking features. Withreference to FIG. 1, there is represented a substrate 10, such as asilicon wafer, having a feature 12 formed as by laser radiation on thesurface 14 of the substrate 10. Various additional layers, such aselectrically conductive and electrically nonconductive layers typical tointegrated circuit fabrication are applied over the substrate 10, andhave features formed therein. Accordingly, as used herein, the term“substrate” refers not only to the base substrate 10, such as thesilicon wafer, but to the entirety of any succeeding layers depositedthereon.

In the conventional structure depicted in FIG. 1, residue 16 easilycollects in, and is difficult to remove from feature 12 due to the depthand relatively high aspect ratio of the feature 12. The depth and shapeof the feature 12 make it difficult to remove the residue 16 from thefeature 12. Conventional features 12 are typically formed in a singlelaser radiation step, and have wall angles α of at least about sixtydegrees and a depth D of at least about twelve microns. With such ageometry, the residue 16 that remains in the bottom of the feature 12becomes a potential source of contamination for the integrated circuitsthat are fabricated in close proximity to the feature 12. For example,during subsequent baking processes, the photoresist debris 16 mayexplode from the bottom of the feature 12 and redeposit on nearbyintegrated circuits, thus damaging the integrated circuits and loweringthe yield of integrated circuits on the substrate.

Such features 12 are typically used to form identifying indicia on thesurface of the substrate, and as such are formed on the substrate at ornear the very beginning of substrate processing. Thus, there is ampleopportunity for debris to collect within the feature 12, and redepositat later times on the nearby integrated circuits.

The invention avoids undesirable marking geometries such as depicted inFIG. 1, and provides feature shapes that aid in the removal of theresidue that may deposit in the bottom of the features. Accordingly, andwith reference to FIG. 2, there is depicted a feature 12 formed in asubstrate 10 in accordance with a first embodiment of the invention.

The feature 12, having an upper sidewall portion 24 adjacent a lowersidewall portion 26, is formed such as by laser radiation to provide ablind bore in the substrate 10. The upper sidewall portion 24 has anupper sidewall angle that is more shallow than that of the lowersidewall portion 26. In other words, the lower sidewall angle of thelower sidewall portion 26 is steeper than the upper sidewall angle ofthe upper sidewall portion 24. For example, the portion 24 preferablyhas an upper sidewall angle β of from about thirty degrees to aboutsixty degrees, and the portion 26 preferably has a lower sidewall angleδ of from about sixty degrees to about ninety degrees.

The depth d1 of the upper sidewall portion 24 is preferably from aboutfour microns to about eight microns, and the depth d2 of the lowersidewall portion 26 is preferably from about four microns to about eightmicrons, with the combined depth of d1 and d2 preferably being less thanabout twelve microns.

In a second embodiment of the invention, the feature 12 has sidewalls 30with an angle θ of from about thirty degrees to about sixty degrees. Thedepth d of the feature 12 is preferably no greater than about twelvemicrons. The feature 12 according to the present invention is preferablysubstantially circular in cross section so that the sidewalls are ofsubstantially uniform slope.

Indicia elements 12 having the structure and made in accordance with themethod described herein are less susceptible to retaining residue. Asdescribed previously, the presence of residue in the features 12 canadversely affect the fabrication process and significantly reduceyields. In addition, it is desired to provide features havingsubstantially circular cross sections to enhance the visibility of themarks. It has been observed that forming the holes in accordance withthe invention facilitates the forming of holes of substantially circularcross section as compared to prior art methods.

Thus, integrated circuits, such as semiconductor devices, processed inaccordance with the methods as described above tend to have identifyingindicia that are easier to remove residue from and which have superiorvisibility in the finished device. This results in improved integratedcircuit quality and yield.

It is appreciated that the materials as described above, while providingan especially preferred application of the invention, are by way ofexample only, and that other materials that are compatible with thematerials, structures, and processes of integrated circuit processingare also generally applicable to the invention as disclosed herein.

The foregoing embodiments of this invention have been presented forpurposes of illustration and description. They are not intended to beexhaustive or to limit the invention to the precise form disclosed.Obvious modifications or variations are possible in light of the aboveteachings. The embodiments are chosen and described in an effort toprovide illustrations of the principles of the invention and itspractical application, and to thereby enable one of ordinary skill inthe art to utilize the invention in various embodiments and with variousmodifications as is suited to the particular use contemplated. All suchmodifications and variations are within the scope of the invention asdetermined by the appended claims when interpreted in accordance withthe breadth to which they are fairly, legally, and equitably entitled.

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 19. (canceled) 20.Identifying indicia on a substrate, the identifying indicia formed witha pattern of indicia elements, where the indicia elements have a shapethat aids in removal of foreign material from the indicia elements onthe substrate, each indicia element forming a blind bore in thesubstrate, and having a sidewall with an upper sidewall portion havingan upper sidewall angle and a lower sidewall portion having a lowersidewall angle, where the upper sidewall angle is shallower than thelower sidewall angle, and having a depth of no more than about twelvemicrons.